The present invention relates to a nonvolatile semiconductor memory cell and array.
While the suitability of double-dielectric structures for information storage has been known theoretically, practical embodiments to utilize the advantageous physical properties of such structures have long been difficult to achieve. Among the difficulties have been the disturbance of half-selected cells by the high voltages used, and slow write and write recovery time required by the high voltages. In addition, some devices have required both high voltage and dual polarity, which causes increased difficulties of power supply and isolation. However, a dense nonvolatile RAM cell, having read and write speeds comparable with (if not equal to) those typical of static RAMs, would be extremely useful.
U.S. patent application Ser. No. 174,980, of common assignee, which is hereby incorporated by reference, disclosed a 4-transistor CMOS nonvolatile RAM cell satisfying most of these requirements. This cell required four connections to each cell, but attractive features of this previous cell included high protection, static read, and read enhance of the written state. However, the requirement of four connections to each cell imposed a density penalty, required relatively complex peripheral circuits, and imposed stringent requirements on clock timing.
It is thus an object of the present invention to provide a memory cell having high protection, static read, and read enhance of the written state, with not more than three connections to each cell.
It is a further object of the present invention to provide a memory cell having high nonvolatile information protection, static read operation, and read enhance of the written state, having improved read-and-write times.
It is a further object of the present invention to provide a random access memory array having nonvolatile information storage, static read operation, and read enhance of the written state, while maintaining good speed and density.
It is a further object of the present invention to provide a random access memory array having nonvolatile information storage, unipolar operation, static read operation, and read enhance of the written state, while maintaining good speed and density.